Robust and reliable clocking circuits are important to many types of electronic circuitry, particularly circuitry which includes microprocessors. In many systems, a single local oscillator will serve as the clock. However, any disturbance to that clock will adversely effect the operation of the circuits which the clock drives.
In order to obtain a more robust clocking topology, previous circuits have included multiple clock sources. Of those sources, a multiplexer may be used to select an active clocking source. In the event that the current clock source fails, this failure is detected and an alternate clock is selected through use of the multiplexer. Unfortunately, during this failure detection and switchover time, the driven circuitry may see a noisy, irregular or even missing clock signal.
This same problem is present in situations where multiple circuits must run off a common clock, but fall back to a local clock in the event of common clock failure. For example, multiple circuits may share a common clock provided over a bus. Using the above-described techniques, when the bus provided clock fails, a local oscillator is engaged to take over circuit clocking. Of course, this switchover to local clocking leads to all of the above-described problems. This configuration also applied to fault-tolerant systems where multiple identical modules may be clocked off of a “master” module, or other central clocking source. The present invention is directed toward solutions to the above-identified problems.